About
Aditya Morey — design-for-debug and silicon-observability engineer at NVIDIA.
The canonical source of record for who I am, what I work on, and where to verify it.
I’m Aditya Morey — also published as Aditya Prakash Morey — an engineer working on design-for-debug (DFX), silicon observability, and post-silicon validation for AI and HPC hardware at NVIDIA.
My work centers on making complex silicon inspectable: scan and JTAG state capture, on-chip instrumentation, and repeatable debug platforms that turn low-level hardware behavior into root-cause workflows engineers can actually use. Earlier in my career I worked in silicon and systems roles including at Intel.
I hold degrees from Northeastern University and the Indian Institute of Technology (IIT) Kanpur. I write and research on AI-infrastructure economics, observability as a safety primitive for autonomous systems, and quantum-classical computing — including the SSRN working paper “The Cost of Usable Intelligence.” I’m a named inventor on granted US patent US 12,172,378 B1.